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Renesas unveils Linux-driven RISC-V SoC based on an Andes AX45MP core

Submitted by Rianne Schestowitz on Thursday 3rd of March 2022 08:44:52 PM Filed under
Linux

Renesas announced a headless, 1GHz “RZ/Five” IoT SoC that runs Linux on Andes’ AX45MP RISC-V core with support for up to 4GB DDR4-1600, 1x or 2x GbE ports, 2x CAN, and 2x USB. A SMARC module is in the works.

Renesas has begun sampling the first commercial system-on-chip based on Andes Technology’s 64-bit RISC-V cores. The headless, single-core RZ/Five runs Linux on Andes’ up to 1GHz AndesCore AX45MP core, which was updated for greater performance last December. The SoC is aimed at entry-class social infrastructure gateway control and industrial gateway control.

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Renesas introduces RZ/Five Linux-capable 64-bit RISC-V micro...

Submitted by Roy Schestowitz on Friday 4th of March 2022 09:09:00 AM.
  • Renesas introduces RZ/Five Linux-capable 64-bit RISC-V microprocessor family

    Renesas has launched its first RISC-V processor family with the RZ/Five general-purpose microprocessors based on an Andes AX45MP 64-Bit RISC-V CPU core, and with long-term Linux support via the industrial-grade CIP Linux that offers maintenance for over 10 years.

    The RISC-V processor is pin-to-pin compatible with the Arm Cortex-A55/M33–based RZ/G2UL processor family, and while being a general-purpose family, the RZ/Five chips are specifically well-suited to IoT endpoint devices such as gateways for solar inverters or home security systems.

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