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Open Hardware/Modding: Raspberry Pi, Arduino, and RISC-V

Submitted by Roy Schestowitz on Saturday 11th of December 2021 02:59:52 PM Filed under
Hardware
  • Tim Peake joins us as we get ready to launch special Raspberry Pi computers to space
  • Arduino Drives Faux Spirograph | Hackaday

    The holidays always remind us of our favorite toys from when we were kids. Johnny Astro, an Erector set, and — of course — a Spirograph. [CraftDiaries] has an Arduino machine that isn’t quite a Spirograph, but it sure reminds us of one. The Arduino drives two stepper motors that connect to a pen that can create some interesting patterns.

    The build uses a few parts that were laser cut, but they don’t look like they’d be hard to fabricate using conventional means or even 3D printing. The author even mentions you could make them out of cardboard or foamboard if you wanted to.

  • How the FPGA Came to Be, Part 1 – EEJournal

    I started designing engineering workstations in 1981 for Cadnetix in Boulder, Colorado. The top computer-aided engineering (CAE) vendors of the day – Daisy Systems, Mentor Graphics, and Valid Logic (I called them the DMV) – were all founded in 1981, like Cadnetix, and each developed their own proprietary CAE software suite. The five proprietary Cadnetix workstations that I helped to design, introduced from 1982 to 1985, were all based on versions of Motorola Semiconductor’s 68000 microprocessor family (the 68000, 68010, and 68020) running a proprietary, stripped-down version of Unix (which I privately called Eunuch as an inside joke).

  • Fraunhofer extends RISC-V embedded processor for edge AI

    Fraunhofer IPMS has added TensorFlow Lite and Zve support to its EMSA5-FS RISC-V processor for edge AI applications
    Fraunhofer IPMS in Germany has developed a new option for its EMSA5-FS RISC-V processor to support artificial intelligence (AI) and machine learning (ML) functions at the edge

    Edge AI requires a capable but ultra-low-power and relatively inexpensive System on Chip (SoC). The EMSA5-FS is a 32-bit, single-issue, in-order, five-stage pipeline processor that supports the RISC-V open-standard instruction set architecture. It can include error correction and fault-tolerant features and is ready for ISO 26262 Functional Safety certification.

  • Embedded Studio gets 64bit Risc-V support

    Covering CPUs including RV64I, RV64E and RV64GC with a floating-point unit, it comes integrated with emRun C/C++ runtime and emFloat floating-point libraries, the Segger Linker and Compiler. The GNU compiler and linker are also included.

    “64bit embedded systems are gaining popularity with faster chips and bigger applications,” said compamy MD Ivo Geilenbruegge. “As a long-standing member of the Risc-V foundation, we are committed to support from small 32bit through high-end 64bit cores, from simple debug to flash programming and real-time trace.”

»

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