Hardware: EtherCAT, Raspberry Pi Zero 2 W, and RISC-V

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Whiskey Lake EtherCAT controller offers dual PCIe slots
One of the system’s 4x GbE ports enables the high-throughput EtherCAT fieldbus protocol and supports a wide range of EtherCAT slave (AKA EtherCAT-Secondary) devices. The EtherCAT implementation offers time-deterministic synchronous control for automation and is compatible with third-party EtherCAT assistive-module support, “giving operators freedom to choose different motors and I/O based on cost/performance needs,” says Avalue. The SLP-WHG enables EtherCAT cycle times up to 125μs and offers up to 128-axis motion control and 11200 I/O point control, says Avalue.
Other Linux-ready EtherCAT ready systems include Taicenn’s Atom D2550 based TBOX-4000 and WAGO’s Cortex-A8 powered PFC200. The SLP-WHG is based on Avalue’s EMX-WHLGP thin Mini-ITX board we covered in Mar. 2020.
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Raspberry Pi Zero 2 W External Antenna Mod Expands Wi-Fi Support
Get the wireless support you want on the latest Raspberry Pi Zero 2 W.
The new Raspberry Pi Zero 2 W is an exciting successor to the original Pi Zero W, but some makers insist it has a few areas of improvement that need to be addressed. Brian Dorey has taken matters into his own hands by upgrading the latest board to use an external antenna for wireless connections.
The modification is possible thanks to a U.FL connector. This module is responsible for bridging the connection between the external antenna and Pi Zero 2 W. According to Dorey, it was able to detect 14 Wi-Fi networks with an external antenna but only four without it.
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StarFive Dubhe 64-bit RISC-V core to be found in 12nm, 2 GHz processors - CNX Software
StarFive has just announced customers’ delivery of the 64-bit RISC-V Dubhe core based on RV64GC ISA plus bit manipulation, user-level interrupts, as well as the latest Vector 1.0 (V) and Hypervisor (H) instructions.
StarFive Dubhe can be clocked up to 2 GHz on a 12nm TSMC process node, and the company also released performance numbers with a SPECint2006 score of 8.9/GHz, a Dhrystone score of 6.6 DMIPS/MHz, and a CoreMark score of 7.6/MHz. A third-party source told CNX Software it should be equivalent to the SiFive Performance P550 RISC-V core announced last summer, itself comparable to Cortex-A75.
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Apple Falling Division | Hackaday
[Paul Curtis] over at Segger has an interesting series of blog posts about calculating division. This used to be a hotter topic, but nowadays many computers or computer languages have support for multiplication and division built-in. But some processors lack the instructions and a library to do it might be less than ideal. Knowing how to roll your own might allow you to optimize for speed or space. The current installment covers using Newton’s algorithm to do division.
Steve Martin had a famous bit about how to be a millionaire and never pay taxes. He started out by saying, “First… get a million dollar. Then…” This method is a bit like that since you first have to know how to multiply before you can divide. The basic premise is twofold: Newton’s method let you refine an estimate of a reciprocal by successive multiplications and then multiplying a number a reciprocal is the same as dividing. In other words, if we need to divide 34 by 6, you could rewrite 36/6 to 36 * 1/6 and the answer is the same.
[...]
We liked that the post has a fixed-point implementation and then examines the resulting assembly code for ARM, RISC-V, and dsPIC30. Well worth a read.
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