Open Hardware: Raspberry Pi and RISC-V

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Raspberry Pi Pico vs Zero: The Differences
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Raspberry Pi & Machine Learning: All You Need to Know
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There's a hack to add CarPlay support to a Tesla | AppleInsider
That video feed is supplied by a collection of hardware carried inside the vehicle, which is used to run Android. The assembly includes a pair of Raspberry Pi units, with one used for Android and the other using Linux and handling video and connectivity duties.
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Tesla Refuses To Integrate Apple's CarPlay — You Can Do It Anyway | Benzinga
The solution uses a cheap computer development platform Raspberry Pi with a mobile network modem and a wireless internet access point running an Android-based system, micro-HDMI to HDMI cable, and an Ethernet cable. As shown in his YouTube video, the car connects to the device's network and displays the CarPlay interface on its screen inside the web browser — including applications such as Maps and Apple Music. The solution works while driving and can even be controlled with the media buttons present on the car's steering wheel.
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Lilbits: MIPS pivots to RISC-V, Intel staggers desktop Arc graphics release, and Google releases I/O Pinball
Last year MIPS Technologies announced that it was going to stop designing MIPS processors. That might sound surprising given the company’s name, but maybe it was inevitable when looking at trends in the semiconductor industry.
So MIPS pivoted to RISC-V architecture. And the company’s first chips based on that open instruction set are set to launch later this year. MIPS is promising best-in-class performance, but we’ll likely have to wait until this fall to find out whether the company can deliver on that promise.
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MIPS says first RISC-V chips coming in Q4 2022 • The Register
MIPS is back, but this time the company is bringing processors to market based on the RISC-V open instruction set architecture, rather than the MIPS architecture the chip designer is synonymous with.
The current incarnation* of MIPS proclaimed its entry to the RISC-V market with a preview of the first products in its new eVocore processor line, which initially comprises two multiprocessor IP cores, the eVocore P8700 and I8500.
MIPS said that the new processors are designed for high-performance, real-time compute applications such as networking, datacenter, and the automotive industry.
To deliver on this goal, the eVocore IP cores was developed around scalability. MIPS said it aims to allow customers to specify custom chip configurations that combine coherent clusters of the multi-threaded, multi-core CPUs to match their power and performance requirements.
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RISC-V CEO: Winning over giants like Intel key to growth • The Register
The CEO of RISC-V's governing body says she wants to nothing less than "world domination" for the rising open-source processor technology, but to do that, the nonprofit needs buy-in from a variety of organizations, even those steeped in dominant, proprietary architectures, such as x86 giant Intel.
In an interview this week with The Register, RISC-V International CEO Calista Redmond reckons the buy-in, which comes in the form of paid memberships, is needed to support ongoing development of the royalty-free CPU instruction set architecture to better compete with x86 and Arm ISAs.
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